Merge pull request #1193 from lioncash/priv
gpu: Make memory_manager private
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commit
4d7e1662c8
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@ -56,9 +56,9 @@ u32 nvhost_as_gpu::AllocateSpace(const std::vector<u8>& input, std::vector<u8>&
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auto& gpu = Core::System::GetInstance().GPU();
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const u64 size{static_cast<u64>(params.pages) * static_cast<u64>(params.page_size)};
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if (params.flags & 1) {
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params.offset = gpu.memory_manager->AllocateSpace(params.offset, size, 1);
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params.offset = gpu.MemoryManager().AllocateSpace(params.offset, size, 1);
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} else {
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params.offset = gpu.memory_manager->AllocateSpace(size, params.align);
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params.offset = gpu.MemoryManager().AllocateSpace(size, params.align);
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}
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std::memcpy(output.data(), ¶ms, output.size());
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@ -88,7 +88,7 @@ u32 nvhost_as_gpu::Remap(const std::vector<u8>& input, std::vector<u8>& output)
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u64 size = static_cast<u64>(entry.pages) << 0x10;
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ASSERT(size <= object->size);
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Tegra::GPUVAddr returned = gpu.memory_manager->MapBufferEx(object->addr, offset, size);
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Tegra::GPUVAddr returned = gpu.MemoryManager().MapBufferEx(object->addr, offset, size);
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ASSERT(returned == offset);
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}
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std::memcpy(output.data(), entries.data(), output.size());
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@ -125,9 +125,9 @@ u32 nvhost_as_gpu::MapBufferEx(const std::vector<u8>& input, std::vector<u8>& ou
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auto& gpu = Core::System::GetInstance().GPU();
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if (params.flags & 1) {
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params.offset = gpu.memory_manager->MapBufferEx(object->addr, params.offset, object->size);
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params.offset = gpu.MemoryManager().MapBufferEx(object->addr, params.offset, object->size);
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} else {
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params.offset = gpu.memory_manager->MapBufferEx(object->addr, object->size);
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params.offset = gpu.MemoryManager().MapBufferEx(object->addr, object->size);
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}
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// Create a new mapping entry for this operation.
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@ -161,7 +161,7 @@ u32 nvhost_as_gpu::UnmapBuffer(const std::vector<u8>& input, std::vector<u8>& ou
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itr->second.size);
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auto& gpu = system_instance.GPU();
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params.offset = gpu.memory_manager->UnmapBuffer(params.offset, itr->second.size);
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params.offset = gpu.MemoryManager().UnmapBuffer(params.offset, itr->second.size);
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buffer_mappings.erase(itr->second.offset);
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@ -264,7 +264,7 @@ void RasterizerMarkRegionCached(Tegra::GPUVAddr gpu_addr, u64 size, bool cached)
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u64 num_pages = ((gpu_addr + size - 1) >> PAGE_BITS) - (gpu_addr >> PAGE_BITS) + 1;
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for (unsigned i = 0; i < num_pages; ++i, gpu_addr += PAGE_SIZE) {
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boost::optional<VAddr> maybe_vaddr =
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Core::System::GetInstance().GPU().memory_manager->GpuToCpuAddress(gpu_addr);
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Core::System::GetInstance().GPU().MemoryManager().GpuToCpuAddress(gpu_addr);
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// The GPU <-> CPU virtual memory mapping is not 1:1
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if (!maybe_vaddr) {
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LOG_ERROR(HW_Memory,
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@ -346,7 +346,7 @@ void RasterizerFlushVirtualRegion(VAddr start, u64 size, FlushMode mode) {
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const VAddr overlap_end = std::min(end, region_end);
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const std::vector<Tegra::GPUVAddr> gpu_addresses =
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system_instance.GPU().memory_manager->CpuToGpuAddress(overlap_start);
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system_instance.GPU().MemoryManager().CpuToGpuAddress(overlap_start);
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if (gpu_addresses.empty()) {
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return;
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@ -22,7 +22,7 @@ u32 FramebufferConfig::BytesPerPixel(PixelFormat format) {
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}
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GPU::GPU(VideoCore::RasterizerInterface& rasterizer) {
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memory_manager = std::make_unique<MemoryManager>();
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memory_manager = std::make_unique<Tegra::MemoryManager>();
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maxwell_3d = std::make_unique<Engines::Maxwell3D>(rasterizer, *memory_manager);
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fermi_2d = std::make_unique<Engines::Fermi2D>(*memory_manager);
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maxwell_compute = std::make_unique<Engines::MaxwellCompute>();
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@ -31,12 +31,20 @@ GPU::GPU(VideoCore::RasterizerInterface& rasterizer) {
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GPU::~GPU() = default;
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Engines::Maxwell3D& GPU::Maxwell3D() {
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return *maxwell_3d;
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}
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const Engines::Maxwell3D& GPU::Maxwell3D() const {
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return *maxwell_3d;
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}
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Engines::Maxwell3D& GPU::Maxwell3D() {
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return *maxwell_3d;
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MemoryManager& GPU::MemoryManager() {
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return *memory_manager;
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}
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const MemoryManager& GPU::MemoryManager() const {
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return *memory_manager;
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}
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u32 RenderTargetBytesPerPixel(RenderTargetFormat format) {
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@ -117,18 +117,24 @@ public:
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/// Processes a command list stored at the specified address in GPU memory.
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void ProcessCommandList(GPUVAddr address, u32 size);
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/// Returns a const reference to the Maxwell3D GPU engine.
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const Engines::Maxwell3D& Maxwell3D() const;
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/// Returns a reference to the Maxwell3D GPU engine.
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Engines::Maxwell3D& Maxwell3D();
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std::unique_ptr<MemoryManager> memory_manager;
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/// Returns a const reference to the Maxwell3D GPU engine.
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const Engines::Maxwell3D& Maxwell3D() const;
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/// Returns a reference to the GPU memory manager.
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Tegra::MemoryManager& MemoryManager();
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/// Returns a const reference to the GPU memory manager.
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const Tegra::MemoryManager& MemoryManager() const;
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private:
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/// Writes a single register in the engine bound to the specified subchannel
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void WriteReg(u32 method, u32 subchannel, u32 value, u32 remaining_params);
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std::unique_ptr<Tegra::MemoryManager> memory_manager;
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/// Mapping of command subchannels to their bound engine ids.
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std::unordered_map<u32, EngineID> bound_engines;
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@ -424,8 +424,8 @@ std::tuple<u8*, GLintptr, GLintptr> RasterizerOpenGL::UploadMemory(u8* buffer_pt
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std::tie(buffer_ptr, buffer_offset) = AlignBuffer(buffer_ptr, buffer_offset, alignment);
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GLintptr uploaded_offset = buffer_offset;
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const auto& memory_manager = Core::System::GetInstance().GPU().memory_manager;
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const boost::optional<VAddr> cpu_addr{memory_manager->GpuToCpuAddress(gpu_addr)};
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auto& memory_manager = Core::System::GetInstance().GPU().MemoryManager();
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const boost::optional<VAddr> cpu_addr{memory_manager.GpuToCpuAddress(gpu_addr)};
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Memory::ReadBlock(*cpu_addr, buffer_ptr, size);
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buffer_ptr += size;
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@ -168,8 +168,8 @@ static const FormatTuple& GetFormatTuple(PixelFormat pixel_format, ComponentType
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}
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VAddr SurfaceParams::GetCpuAddr() const {
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const auto& gpu = Core::System::GetInstance().GPU();
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return *gpu.memory_manager->GpuToCpuAddress(addr);
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auto& gpu = Core::System::GetInstance().GPU();
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return *gpu.MemoryManager().GpuToCpuAddress(addr);
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}
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static bool IsPixelFormatASTC(PixelFormat format) {
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@ -220,14 +220,14 @@ void MortonCopy(u32 stride, u32 block_height, u32 height, std::vector<u8>& gl_bu
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Tegra::GPUVAddr addr) {
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constexpr u32 bytes_per_pixel = SurfaceParams::GetFormatBpp(format) / CHAR_BIT;
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constexpr u32 gl_bytes_per_pixel = CachedSurface::GetGLBytesPerPixel(format);
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const auto& gpu = Core::System::GetInstance().GPU();
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auto& gpu = Core::System::GetInstance().GPU();
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if (morton_to_gl) {
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// With the BCn formats (DXT and DXN), each 4x4 tile is swizzled instead of just individual
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// pixel values.
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const u32 tile_size{IsFormatBCn(format) ? 4U : 1U};
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const std::vector<u8> data =
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Tegra::Texture::UnswizzleTexture(*gpu.memory_manager->GpuToCpuAddress(addr), tile_size,
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Tegra::Texture::UnswizzleTexture(*gpu.MemoryManager().GpuToCpuAddress(addr), tile_size,
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bytes_per_pixel, stride, height, block_height);
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const size_t size_to_copy{std::min(gl_buffer.size(), data.size())};
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gl_buffer.assign(data.begin(), data.begin() + size_to_copy);
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@ -237,7 +237,7 @@ void MortonCopy(u32 stride, u32 block_height, u32 height, std::vector<u8>& gl_bu
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LOG_WARNING(Render_OpenGL, "need to use correct swizzle/GOB parameters!");
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VideoCore::MortonCopyPixels128(
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stride, height, bytes_per_pixel, gl_bytes_per_pixel,
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Memory::GetPointer(*gpu.memory_manager->GpuToCpuAddress(addr)), gl_buffer.data(),
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Memory::GetPointer(*gpu.MemoryManager().GpuToCpuAddress(addr)), gl_buffer.data(),
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morton_to_gl);
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}
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}
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@ -754,9 +754,9 @@ Surface RasterizerCacheOpenGL::GetSurface(const SurfaceParams& params, bool pres
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return {};
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}
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const auto& gpu = Core::System::GetInstance().GPU();
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auto& gpu = Core::System::GetInstance().GPU();
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// Don't try to create any entries in the cache if the address of the texture is invalid.
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if (gpu.memory_manager->GpuToCpuAddress(params.addr) == boost::none)
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if (gpu.MemoryManager().GpuToCpuAddress(params.addr) == boost::none)
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return {};
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// Look up surface in the cache based on address
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@ -848,7 +848,7 @@ Surface RasterizerCacheOpenGL::RecreateSurface(const Surface& surface,
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"reinterpretation but the texture is tiled.");
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}
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size_t remaining_size = new_params.SizeInBytes() - params.SizeInBytes();
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auto address = Core::System::GetInstance().GPU().memory_manager->GpuToCpuAddress(
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auto address = Core::System::GetInstance().GPU().MemoryManager().GpuToCpuAddress(
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new_params.addr + params.SizeInBytes());
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std::vector<u8> data(remaining_size);
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Memory::ReadBlock(*address, data.data(), data.size());
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@ -382,7 +382,7 @@ void GraphicsSurfaceWidget::OnUpdate() {
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// TODO: Implement a good way to visualize alpha components!
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QImage decoded_image(surface_width, surface_height, QImage::Format_ARGB32);
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boost::optional<VAddr> address = gpu.memory_manager->GpuToCpuAddress(surface_address);
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boost::optional<VAddr> address = gpu.MemoryManager().GpuToCpuAddress(surface_address);
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// TODO(bunnei): Will not work with BCn formats that swizzle 4x4 tiles.
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// Needs to be fixed if we plan to use this feature more, otherwise we may remove it.
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@ -443,7 +443,7 @@ void GraphicsSurfaceWidget::SaveSurface() {
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pixmap->save(&file, "PNG");
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} else if (selectedFilter == bin_filter) {
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auto& gpu = Core::System::GetInstance().GPU();
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boost::optional<VAddr> address = gpu.memory_manager->GpuToCpuAddress(surface_address);
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boost::optional<VAddr> address = gpu.MemoryManager().GpuToCpuAddress(surface_address);
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const u8* buffer = Memory::GetPointer(*address);
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ASSERT_MSG(buffer != nullptr, "Memory not accessible");
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