spirv_atomic: Define U32x2 storage buffers for 64-bit storage atomics
Some drivers do not support 64-bit atomics, and fallback to atomically modifying U32x2 vectors. This change ensures that U32x2 storage vectors are defined in the spir-v shader when 64-bit atomics are used. Fixes a hang on some devices, notably Intel GPUs, when booting Pokemon Legends Arceus
This commit is contained in:
parent
1900abde13
commit
4790ba7839
|
@ -74,7 +74,7 @@ Id StorageAtomicU64(EmitContext& ctx, const IR::Value& binding, const IR::Value&
|
||||||
const auto [scope, semantics]{AtomicArgs(ctx)};
|
const auto [scope, semantics]{AtomicArgs(ctx)};
|
||||||
return (ctx.*atomic_func)(ctx.U64, pointer, scope, semantics, value);
|
return (ctx.*atomic_func)(ctx.U64, pointer, scope, semantics, value);
|
||||||
}
|
}
|
||||||
LOG_ERROR(Shader_SPIRV, "Int64 atomics not supported, fallback to non-atomic");
|
LOG_WARNING(Shader_SPIRV, "Int64 atomics not supported, fallback to non-atomic");
|
||||||
const Id pointer{StoragePointer(ctx, ctx.storage_types.U32x2, &StorageDefinitions::U32x2,
|
const Id pointer{StoragePointer(ctx, ctx.storage_types.U32x2, &StorageDefinitions::U32x2,
|
||||||
binding, offset, sizeof(u32[2]))};
|
binding, offset, sizeof(u32[2]))};
|
||||||
const Id original_value{ctx.OpBitcast(ctx.U64, ctx.OpLoad(ctx.U32[2], pointer))};
|
const Id original_value{ctx.OpBitcast(ctx.U64, ctx.OpLoad(ctx.U32[2], pointer))};
|
||||||
|
@ -267,7 +267,7 @@ Id EmitStorageAtomicExchange64(EmitContext& ctx, const IR::Value& binding, const
|
||||||
const auto [scope, semantics]{AtomicArgs(ctx)};
|
const auto [scope, semantics]{AtomicArgs(ctx)};
|
||||||
return ctx.OpAtomicExchange(ctx.U64, pointer, scope, semantics, value);
|
return ctx.OpAtomicExchange(ctx.U64, pointer, scope, semantics, value);
|
||||||
}
|
}
|
||||||
LOG_ERROR(Shader_SPIRV, "Int64 atomics not supported, fallback to non-atomic");
|
LOG_WARNING(Shader_SPIRV, "Int64 atomics not supported, fallback to non-atomic");
|
||||||
const Id pointer{StoragePointer(ctx, ctx.storage_types.U32x2, &StorageDefinitions::U32x2,
|
const Id pointer{StoragePointer(ctx, ctx.storage_types.U32x2, &StorageDefinitions::U32x2,
|
||||||
binding, offset, sizeof(u32[2]))};
|
binding, offset, sizeof(u32[2]))};
|
||||||
const Id original{ctx.OpBitcast(ctx.U64, ctx.OpLoad(ctx.U32[2], pointer))};
|
const Id original{ctx.OpBitcast(ctx.U64, ctx.OpLoad(ctx.U32[2], pointer))};
|
||||||
|
|
|
@ -688,7 +688,7 @@ void VisitUsages(Info& info, IR::Inst& inst) {
|
||||||
case IR::Opcode::StorageAtomicAnd64:
|
case IR::Opcode::StorageAtomicAnd64:
|
||||||
case IR::Opcode::StorageAtomicOr64:
|
case IR::Opcode::StorageAtomicOr64:
|
||||||
case IR::Opcode::StorageAtomicXor64:
|
case IR::Opcode::StorageAtomicXor64:
|
||||||
info.used_storage_buffer_types |= IR::Type::U64;
|
info.used_storage_buffer_types |= IR::Type::U64 | IR::Type::U32x2;
|
||||||
info.uses_int64_bit_atomics = true;
|
info.uses_int64_bit_atomics = true;
|
||||||
break;
|
break;
|
||||||
case IR::Opcode::BindlessImageAtomicIAdd32:
|
case IR::Opcode::BindlessImageAtomicIAdd32:
|
||||||
|
|
Loading…
Reference in New Issue