shader_ir/memory: Add LD_L 64 bits loads
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eceab45dac
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0be835132c
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@ -104,16 +104,27 @@ u32 ShaderIR::DecodeMemory(BasicBlock& bb, const BasicBlock& code, u32 pc) {
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}
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}
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case OpCode::Id::LD_L: {
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case OpCode::Id::LD_L: {
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UNIMPLEMENTED_IF_MSG(instr.ld_l.unknown == 1, "LD_L Unhandled mode: {}",
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UNIMPLEMENTED_IF_MSG(instr.ld_l.unknown == 1, "LD_L Unhandled mode: {}",
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static_cast<unsigned>(instr.ld_l.unknown.Value()));
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static_cast<u32>(instr.ld_l.unknown.Value()));
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const Node index = Operation(OperationCode::IAdd, GetRegister(instr.gpr8),
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const auto GetLmem = [&](s32 offset) {
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Immediate(static_cast<s32>(instr.smem_imm)));
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ASSERT(offset % 4 == 0);
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const Node lmem = GetLocalMemory(index);
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const Node immediate_offset = Immediate(static_cast<s32>(instr.smem_imm) + offset);
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const Node address = Operation(OperationCode::IAdd, NO_PRECISE, GetRegister(instr.gpr8),
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immediate_offset);
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return GetLocalMemory(address);
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};
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switch (instr.ldst_sl.type.Value()) {
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switch (instr.ldst_sl.type.Value()) {
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case Tegra::Shader::StoreType::Bytes32:
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case Tegra::Shader::StoreType::Bytes32:
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SetRegister(bb, instr.gpr0, lmem);
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SetRegister(bb, instr.gpr0, GetLmem(0));
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break;
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break;
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case Tegra::Shader::StoreType::Bytes64: {
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SetTemporal(bb, 0, GetLmem(0));
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SetTemporal(bb, 1, GetLmem(4));
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SetRegister(bb, instr.gpr0, GetTemporal(0));
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SetRegister(bb, instr.gpr0.Value() + 1, GetTemporal(1));
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break;
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}
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default:
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default:
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UNIMPLEMENTED_MSG("LD_L Unhandled type: {}",
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UNIMPLEMENTED_MSG("LD_L Unhandled type: {}",
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static_cast<unsigned>(instr.ldst_sl.type.Value()));
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static_cast<unsigned>(instr.ldst_sl.type.Value()));
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