GPU: Use explicit types when retrieving the uniform values for fsetp/fset and isetp instead of the type of an invalid output register.
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7c181fd4f4
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90cddf1996
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@ -197,6 +197,11 @@ public:
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return active_type == Type::Integer;
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return active_type == Type::Integer;
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}
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}
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/// Returns the current active type of the register
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Type GetActiveType() const {
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return active_type;
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}
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/// Returns the index of the register
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/// Returns the index of the register
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size_t GetIndex() const {
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size_t GetIndex() const {
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return index;
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return index;
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@ -328,22 +333,28 @@ public:
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shader.AddLine(dest + " = " + src + ';');
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shader.AddLine(dest + " = " + src + ';');
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}
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}
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/// Generates code representing a uniform (C buffer) register.
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/// Generates code representing a uniform (C buffer) register, interpreted as the input type.
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std::string GetUniform(const Uniform& uniform, const Register& dest_reg) {
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std::string GetUniform(const Uniform& uniform, GLSLRegister::Type type) {
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declr_const_buffers[uniform.index].MarkAsUsed(static_cast<unsigned>(uniform.index),
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declr_const_buffers[uniform.index].MarkAsUsed(static_cast<unsigned>(uniform.index),
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static_cast<unsigned>(uniform.offset), stage);
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static_cast<unsigned>(uniform.offset), stage);
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std::string value =
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std::string value =
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'c' + std::to_string(uniform.index) + '[' + std::to_string(uniform.offset) + ']';
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'c' + std::to_string(uniform.index) + '[' + std::to_string(uniform.offset) + ']';
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if (regs[dest_reg].IsFloat()) {
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if (type == GLSLRegister::Type::Float) {
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return value;
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return value;
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} else if (regs[dest_reg].IsInteger()) {
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} else if (type == GLSLRegister::Type::Integer) {
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return "floatBitsToInt(" + value + ')';
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return "floatBitsToInt(" + value + ')';
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} else {
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} else {
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UNREACHABLE();
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UNREACHABLE();
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}
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}
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}
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}
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/// Generates code representing a uniform (C buffer) register, interpreted as the type of the
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/// destination register.
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std::string GetUniform(const Uniform& uniform, const Register& dest_reg) {
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return GetUniform(uniform, regs[dest_reg].GetActiveType());
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}
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/// Add declarations for registers
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/// Add declarations for registers
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void GenerateDeclarations() {
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void GenerateDeclarations() {
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for (const auto& reg : regs) {
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for (const auto& reg : regs) {
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@ -986,7 +997,7 @@ private:
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if (instr.is_b_gpr) {
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if (instr.is_b_gpr) {
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op_b += regs.GetRegisterAsFloat(instr.gpr20);
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op_b += regs.GetRegisterAsFloat(instr.gpr20);
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} else {
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} else {
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op_b += regs.GetUniform(instr.uniform, instr.gpr0);
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op_b += regs.GetUniform(instr.uniform, GLSLRegister::Type::Float);
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}
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}
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}
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}
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@ -1027,9 +1038,7 @@ private:
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if (instr.is_b_gpr) {
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if (instr.is_b_gpr) {
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op_b += regs.GetRegisterAsInteger(instr.gpr20, 0, instr.isetp.is_signed);
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op_b += regs.GetRegisterAsInteger(instr.gpr20, 0, instr.isetp.is_signed);
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} else {
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} else {
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// TODO(Subv): This family of instructions don't store to a GPR, but GetUniform
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op_b += regs.GetUniform(instr.uniform, GLSLRegister::Type::Integer);
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// needs to know the type of the output register.
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op_b += regs.GetUniform(instr.uniform, instr.gpr0);
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}
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}
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using Tegra::Shader::Pred;
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using Tegra::Shader::Pred;
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@ -1075,7 +1084,7 @@ private:
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if (instr.is_b_gpr) {
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if (instr.is_b_gpr) {
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op_b += regs.GetRegisterAsFloat(instr.gpr20);
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op_b += regs.GetRegisterAsFloat(instr.gpr20);
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} else {
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} else {
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op_b += regs.GetUniform(instr.uniform, instr.gpr0);
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op_b += regs.GetUniform(instr.uniform, GLSLRegister::Type::Float);
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}
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}
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}
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}
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